![[viika Logo]](../viikasm.gif)
last update: 2009-08-29 JSE Some of these papers have also been published in the technical literature, but we have chosen to show links to readily accessible versions on the corporate sites.
The Linux/ia64 Project: Kernel Design and Status Report by Stephane Eranian and David Mosberger, 2000, HP Technical Report HPL-2000-85 (about 186 KiB)
Optimizing Itanium-based Applications, Hewlett-Packard Corporation, Version 1.9, 2008, pdf format (96 KiB)
PA-RISC 2.0 Architecture by Gerry Kane, 1996, available as separate chapters here (336 KiB to 2.2 MiB)
The Libm Library and Floating-Point Arithmetic in HP-UX for Itanium-Based Systems by James W. Thomas, Jon P. Okada, Peter Markstein, and Ren-Cang Li, 2004, pdf format (258 KiB)
Implementation of the Next Generation 64b Itanium Processor by Sam Naffziger and Gary Hammond, 2002, Overview.pdf (149 KiB)
Dynamic Scheduling Techniques for VLIW Processors by B. Ramakrishna Rau, 1993, HP Technical Report HPL-93-52 (1.6 MiB)
Instruction-Level Parallel Processing: History, Overview, and Perspective by B. Ramakrishna Rau and Joseph A. Fisher, 1992, HP Technical Report HPL-92-132 (3.2 MiB)
Machine-Description Driven Compilers for EPIC Processors by B. Ramakrishna Rau, Vinod Kathail, and Shail Aditya,, 1998, HP Technical Report HPL-98-40 (404 KiB)
EPIC: An Architecture for Instruction-Level Parallel Processors by Michael S. Schlansker and B. Ramakrishna Rau, 2000, HP Technical Report HPL-99-111 (368 KiB)
Achieving High Levels of Instruction-Level Parallelism with Reduced Hardware Complexity, by Michael S. Schlansker, B. Ramakrishna Rau, Scott Mahlke, Vinod Kathail, Richard Johnson, Sadun Anik, and Santosh G. Abraham, 2000, HP Technical Report HPL-96-120 (412 KiB)
Parallelization of Loops with Exits on Pipelined Architectures by Parthasarathy Tirumalai, Meng Lee, and Michael S. Schlansker, 1990, HP Technical Report HPL-90-107 (1.0 MiB)
HP Compilers for HP Integrity Servers: HP-UX, 2006, CompilersTechOverview.pdf (407 KiB)
Inside the Intel Itanium 2 Processor, 2002, available here (791 KiB)
IA-32 Execution Layer: a two-phase dynamic translator designed to support IA-32 applications on Itanium-based systems by Leonid Baraz, Tevi Devor, Orna Etzion, Shalom Goldenberg, Alex Skaletsky, Yun Wang, and Yigal Zemach, 2003, available here
Intel's 90 nm Technology: Moore's Law and More by Mark Bohr, 2002, available here (1887 KiB)
"IA-64 Floating-Point Operations and the IEEE Standard for Binary Floating-Point Arithmetic" by Marius Cornea-Hasegan and Bob Norin, Intel Technology Journal Q4, 1999, ia64pbf.pdf (566 KiB)
"An Overview of the Intel IA-64 Compiler" by Carole Dulong, Rakesh Krishnaiyer, Dattatraya Kulkarni, Daniel Lavery, Wei Li, John Ng, and David Sehr, Intel Technology Journal Q4, 1999, compiler.pdf (80 KiB)
Highly Optimized Mathematical Functions for the IA-64 Architecture by Yuri Akutin et al., 2004, libm.pdf (157 KiB)
Compiling for Itanium Architecture: Triumphs and Challenges by Wei Li, 2001, epic-keynote.pdf (80 KiB)
"Cramming More Components onto Integrated Circuits" by Gordon E. Moore, Electronics 38 (8), 114-117, 1965, Gordon_Moore_1965_Article.pdf (167 KiB)
"A 1.5GHz Third Generation Itanium® Microprocessor" by Jason Stinson and Stefan Rusu, ISSCC-2003, 2003, 14_4_slides_r31_nsn.pdf and paper14_4.pdf
"The Internet Streaming SIMD Extensions" by Shreekant Thakkar and Tom Huff, Intel Technology Journal Q2, 1999, simd_ext.pdf (47 KiB)
"The Challenges of New Software for a New Architecture" by Richard Wirt, Intel Technology Journal Q4, 1999, forward.htm (24 Kib)
Intel Itanium Processor Family Reference Guide: IA-32 Execution Layer, 2004, 25431803.pdf (33795 bytes)
Optimizing Applications with the Intel C++ and Fortran Compilers for Windows and Linux, 2005, compiler_optimization.pdf
"The GEM Optimizing Compiler System" by David S. Blickstein, Peter W. Craig, Caroline S. Davidson, R. Neil Faiman, Jr., Kent D. Glossop, Richard B. Grove, Steven O. Hobbs, and William B. Noyce, Digital Technical Journal, 4 (4), 121-136, 1992
"Design of the 64-bit Option for the Oracle7 Relational Database Management System" by Vipin V. Gokhale, Digital Technical Journal, 8 (4), 76-82, 1996
IA-64 Architcture: A Detailed Tutorial by Sverre Jarp, version 3, 1999, pdf format (808 KiB)
Scaling Itanium Architecture for Higher Performance by Walt Triebel and Joe Bissell, 2008, available here
"The Lives and Death of Moore's Law" by Ilkka Tuomi, First Monday 7 (11), 2002, available here
[viika] [Itanium Architecture home] [Reference Material home] [Top of Page] [e-mail the author(s)]
last update: 2009-08-29 JSE